Reconfigurable processor for executing successive function seque

Reconfigurable processor with alternately interconnected...

Reconfigurable single instruction multiple data array

Reconfigurable VLIW processor

Reconfiguration of execution path upon verification of...

Reduced instruction set computer architecture with...

Reduced power parallel processor apparatus

Register allocation via selective spilling

Register and instruction controller for superscalar processor

Register file and operating system thereof

Register file having shared and local data word parts

Register file indexing methods and apparatus for providing...

Register file regions for a processing system

Register pipe for multi-processing engine environment

Register rename stack for a microprocessor

Register renaming in which moves are accomplished by swapping re

Register renaming in which moves are accomplished by...

Register renaming system

Register scoreboarding to support overlapped execution of...

Registers for 2-D matrix processing