Fast conversion of encoded tag bits

Details Fast conversion of encoded tag bits Fast conversion of encoded tag bits

1998-09-30

2002-04-02

Eng, David Y. (Department: 2155)

Electrical computers and digital processing systems: processing

Processing architecture

Microprocessor or multichip or multimodule processor having...

Reexamination Certificate

active

06367000

ABSTRACT:

BACKGROUND
1. Field of the Invention
This invention relates to microprocessor systems. In particular, the invention relates to conversion of tag bits.
2. Description of Related Art
An execution unit in a microprocessor performs a number of operations including arithmetic and logic operations. The inputs to these operations or the results of these operations are usually stored in a set of arithmetic or logic registers. The status or conditions of these registers are stored in tag registers. The tag registers contain the tag bits that are encoded to represent the status of the corresponding arithmetic or logic registers.
When the state of the processor is saved as a result of an execution of a save instruction, the content of the tag register is saved together with other pertinent information. In a context switch, it is desirable to save the content of the tag register as fast as possible. At the same time, a new processor should also maintain software compatibility with an existing processor. It is therefore necessary to keep the existing tag register while providing a new tag register that is used by a new save instruction.
As an example, a floating-point unit (FPU) in a microprocessor having eight floating-point (FP) registers may have a tag register encoded with 16 bits with 2 bits for each FP register. A new tag register may be defined having eight bits with one bit for each FP register. A new save instruction, therefore, needs to perform a conversion of the 16-bit tag register to an 8-bit tag register efficiently.
Therefore there is a need to provide an efficient technique to convert the encoded tag bits.
SUMMARY
The present invention is a method and apparatus for converting a first tag word into a second tag word which correspond to a set of registers. Adjacent bits in the first tag word are determined which correspond to different registers in the set of registers. The determined adjacent bits in the first tag word are extracted and deposited into corresponding adjacent bit positions in the second tag word.


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