Reduced instruction fetch latency in a system including a...

Repair of mis-predicted load values

Rotator circular buffer with entries to store divided...

Selecting cache to fetch in multi-level cache system based...

Selecting next instruction line buffer stage based on...

Selection from multiple fetch addresses generated concurrently i

Simple algorithmic cryptography engine

Simultaneously setting prefetch address and fetch address...

Software source transfer selects instruction word sizes

Software value prediction using pendency records of...

Software-based technique for improving the effectiveness of...

Speculative pre-fetching additional line on cache miss if no...

Storing executing instruction sequence for re-execution upon bac

System and method for concurrent processing

System and method for detecting an erroneous data hazard...

System and method for efficient instruction prefetching...

System and method for handling load and/or store operations in a

System and method for handling load and/or store operations...

System and method for handling load and/or store operations...

System and method for processing thread groups in a SIMD...