Repair of mis-predicted load values

Electrical computers and digital processing systems: processing – Instruction fetching

Reexamination Certificate

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C712S218000, C712S225000

Reexamination Certificate

active

06883086

ABSTRACT:
When fetching a load value for a load instruction results in a cache miss, the load instruction and any load-dependent instructions may be speculatively executed with a predicted load value and retired before the missing cache line is retrieved and the actual load value is determined. By storing the predicted load value in a table, when the actual load value is determined it may be compared with the predicted load value from the table. If the predicted load value was incorrect, the load and load-dependent instructions may be re-executed with the actual load value. A compiler may determine which load instructions are highly predictable and likely to result in cache misses, and designate only those load instructions for speculative execution.

REFERENCES:
patent: 5903749 (1999-05-01), Kenner et al.
patent: 20020091915 (2002-07-01), Parady
Nakra et al., “Value Prediction in VLIW Machines”, Proceedings of the 26th Annual International Conference on Computer Architecture, IEEE, 1999, pp. 258-269.*
Reinman et al., “Predictive Techniques for Agressive Load Speculation”, Proceedings of the 31st Annual ACM/IEEE International Symposium on Microarchitecture, 1998, pp. 127-137.*
David Kroft, Lockup-Free Instruction Fetch/Prefetch Cache Organization, Control Data Canada, Ltd., Canadian Development Division, Mississauga, Ontario, Canada, 1981, pp. 195-201, IEEE.
Chao-Ying Fu, Matthew D. Jennings, Sergei Y. Larin, Thomas M. Conte, Software-Only Value Speculation Scheduling, Department of Electric & Computer Engineering, North Carolina State University, Raleigh, NC., pp. 1-23.
Chao-Ying Fu, Matthew D. Jennings, Sergei Y. Larin, Thomas M. Conte, Value Speculation Scheduling for High Performance Processors, Department of Electric & Computer Engineering, North Carolina State University, Raleigh, NC., pp.—10.
Huiyang Zhou, Chao-Ying Fu, Eric Rotenberg, Thomas M. Conte, A Study of Value Speculative Execution and Misspeculation Recovery in Superscalar Microprocessors, Department of Electric & Computer Engineering, North Carolina State University, pp.—23.

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