Data processor
Dual microcode RAM address mode instruction execution using...
Efficient microcode entry access from sequentially addressed...
IP relative addressing
Linear address extension and mapping to physical memory...
Multiple-core processor with hierarchical microcode store
Pipelined completion for asynchronous communication
Removing local RAM size limitations when executing software...
System and method for expanding the instruction set of an...
System and method for storing immediate data
System and method for storing immediate data
Trace unit