Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to generate an address of a microroutine
Reexamination Certificate
2000-05-17
2003-11-25
Kim, Kenneth S. (Department: 2183)
Electrical computers and digital processing systems: processing
Instruction decoding
Decoding instruction to generate an address of a microroutine
C712S200000, C712S229000
Reexamination Certificate
active
06654875
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to computer instruction processors, and more particularly to instruction processors adapted for execution of platform-independent code.
BACKGROUND OF THE INVENTION
Platform-independent programming languages, for example, Java and Active-X, offer significant advantages over traditional, platform-specific languages. A platform-independent programming language typically supports programs that are executable on multiple hardware platforms independent of the native instruction sets of the hardware platforms. A hardware platform typically includes a computer system having one or more processors (e.g., microprocessors or microcontrollers) which execute a particular set of instructions having a specific format, which is sometimes referred to as the native instruction set. A platform-independent programming language is distinguished from a platform-specific language in that the platform-specific language requires a platform-specific compiler to generate program code including instructions from the native instruction set.
Most platform-independent program code is translated from source code to an intermediate code format, which is then interpreted. The intermediate codes of Java are referred to as “bytecodes,” for example. The intermediate codes are executed by a software interpreter, which executes pre-compiled native instruction routines according to the particular bytecodes. Consequently, the intermediate codes are executable on any computer system having a suitable interpreter.
Many platform-independent programs are relatively compact, which makes them suitable for downloading over a network or modem. Moreover, since the program code is platform-independent, the source computer system (or “server”) can download the same program code irrespective of the particular hardware platform of the target computer system (or “client”). Thus, the distribution of software via the Internet is expected to increasingly be in the form of platform-independent programs.
A problem presented in processing platform-independent program code on some clients is that there may not be a direct correspondence between the word size of the platform-independent program code and the word size of the client. For example, the bytecodes of the platform-independent code may be 32 bits and the client system may be a 36-bit machine. In addition, there may be differences in the manner in which data is represented and arithmetic is performed, for example, twos-complement versus ones-complement. These differences between the platform-independent code and the client can be handled with programming techniques implemented in the interpreter of the client. However, the additional software may drastically reduce the speed at which the platform-independent code is executed.
A system and method that addresses the aforementioned problems, as well as other related problems, is therefore desirable.
SUMMARY OF THE INVENTION
In various embodiments, the invention provides a method and apparatus for dual-mode execution of computer instructions. Certain instructions are executable in one of two modes. The first mode is compatible with the native instruction set and data words, and the second mode is an adaptation suitable for platform independent instructions. Initially, a control word RAM is addressed by the operation code of an instruction, and each word in the control word RAM includes an address into a microcode RAM. The address into the microcode RAM is manipulated in accordance with the various embodiments to reference either a first set of microcode suitable for native instructions and data words, or a second set of microcode for execution in a platform-independent mode.
The above summary of the present invention is not intended to describe each disclosed embodiment of the present invention. The figures and detailed description that follow provide additional example embodiments and aspects of the present invention.
REFERENCES:
patent: 4691278 (1987-09-01), Iwata
patent: 4736289 (1988-04-01), Eaton
patent: 5123096 (1992-06-01), Matuo
Criswell Peter B.
Hartnett Thomas D.
Kuslak John S.
Ward Wayne D.
Crawford & Maunu PLLC
Johnson Charles A.
Kim Kenneth S.
Starr Mark T.
Unisys Corporation
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