Removing local RAM size limitations when executing software...

Details Removing local RAM size limitations when executing software... Removing local RAM size limitations when executing software...

2005-07-21

2011-12-13

Faherty, Corey S (Department: 2183)

Electrical computers and digital processing systems: processing

Instruction decoding

Decoding instruction to generate an address of a microroutine

C712S209000

Reexamination Certificate

active

08078842

ABSTRACT:
An electronic device that comprises a processor including an individual instruction and a first group of instructions. The device further comprises a memory externally coupled to the processor, as well as a second group of instructions. When executed, the first group of instructions causes the processor to execute the second group of instructions in lieu of the individual instruction.

REFERENCES:
patent: 6009261 (1999-12-01), Scalzi et al.
patent: 6298434 (2001-10-01), Lindwer
patent: 6385764 (2002-05-01), Blandy et al.
patent: 7210140 (2007-04-01), Lindwer et al.
patent: 2003/0061254 (2003-03-01), Lindwer et al.

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