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Security token sharable data and synchronization cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Security-enhanced network attached storage device

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Seek queue for improved disk drive performance

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Segment descriptor cache addressed by part of the physical addre

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Segmentation management using a rolling window technique

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Segmentation of logical volumes and movement of selected...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Segmentation suspend mode for real-time interrupt support

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Segmented content addressable memory array and priority encoder

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Segmented distributed memory module cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Segmented memory system employing different interleaving scheme

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Segmenting cache to provide varying service levels

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Segmenting cache to provide varying service levels

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Segmenting non-volatile memory into logical pages sized to fit g

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Selectable block protection for non-volatile memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Selectable block protection for non-volatile memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Selectable block protection for non-volatile memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Selectable block protection for non-volatile memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Selectable two-way, four-way double cache interleave scheme

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Selecting a cache for a request for information

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Selecting a command to send to memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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