Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-04-28
2011-12-20
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S136000, C711SE12071
Reexamination Certificate
active
08082396
ABSTRACT:
A method, apparatus, system, and signal-bearing medium that, in an embodiment, select a command to send to memory. In an embodiment, the oldest command in a write queue that does not collide with a conflict queue is sent to memory and added to the conflict queue if some or all of the following are true: all of the commands in the read queue collide with the conflict queue, any read command incoming from the processor does not collide with the write queue, the number of commands in the write queue is greater than a first threshold, and all commands in the conflict queue have been present for less than a second threshold. In an embodiment, a command does not collide with a queue if the command does not access the same cache line in memory as the commands in the queue. In this way, in an embodiment, write commands are sent to the memory at a time that reduces the impact on the performance of read commands.
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Definition of “queue” as provided by American Heritage Dictionary (cited from http://www.dictionary.com).
Blackmon Herman Lee
Hillier, III Philip Rogers
Kirscht Joseph Allen
Vanderpool Brian T.
Bragdon Reginald
Gamon Owen J.
International Business Machines - Corporation
Loonan Eric
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