Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-05-24
2005-05-24
Nguyen, Hiep T. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S130000, C711S131000
Reexamination Certificate
active
06898672
ABSTRACT:
Storing data in a cache memory of a storage device includes providing access to a first segment of the cache memory on behalf of a first group of external host systems coupled to the storage device and providing access to a second segment of the cache memory on behalf of a second group of external host systems coupled to the storage device, where at least a portion of the second segment of the cache memory is not part of the first segment of the cache memory. In some embodiments, no portion of the second segment of the cache memory is part of the first segment. Storing data in a cache memory of a storage device may also include providing a first data structure in the first segment of the cache memory and providing a second data structure in the second segment of the cache memory, where accessing the first segment includes accessing the first data structure and accessing the second segment includes accessing the second data structure. The data structures may be doubly linked ring lists of blocks of data. Each block of data may correspond to a track on a disk drive. Different groups of external host systems may be provided with different access, priority, and level of service with respect to the different segments of the cache.
REFERENCES:
patent: 6347358 (2002-02-01), Kuwata
patent: 6349363 (2002-02-01), Cai et al.
patent: 6457102 (2002-09-01), Lambright et al.
patent: 6493800 (2002-12-01), Blumrich
patent: 6728836 (2004-04-01), Lambright et al.
Lambright Daniel
Ofek Yuval
Ofer Adi
Vishlitzky Natan
Choate Hall & Stewart
EMC Corporation
Nguyen Hiep T.
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