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Variable write back delay apparatus and methods

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Variable-grained memory sharing for clusters of symmetric multi-

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area

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Variably-sized kernel memory stacks

Electrical computers and digital processing systems: memory – Storage accessing and control

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Varying access parameters for processes to access memory...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area

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Vector and scalar data cache for a vector multiprocessor

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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Vector and scalar data cache for a vector multiprocessor

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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Vector indexed memory unit and method

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

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Vector indexed memory unit and method

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address

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Vector processing unit with reconfigurable data buffer

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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Vector processor

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

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Vector register addressing

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses

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Vector transfer system for packing dis-contiguous vector...

Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment

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Verification of cache prefetch mechanism

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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Verification of global coherence in a multi-node NUMA system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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Verification of memory operations by multiple processors to...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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Verifying primary and backup copies of vital information for...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

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Verifying the integrity of a media key block by storing...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

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Verifying the integrity of a media key block by storing...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

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Verifying the integrity of a media key block by storing...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

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Versatile RAM for programmable logic device

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

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