Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment
Reexamination Certificate
2004-03-29
2009-10-27
Ellis, Richard (Department: 2183)
Electrical computers and digital processing systems: memory
Address formation
Slip control, misaligning, boundary alignment
C711S138000, C712S004000
Reexamination Certificate
active
07610469
ABSTRACT:
A vector transfer unit for handling transfers of vector data between a memory and a data processor in a computer system. Vector data transfer instructions are posted to an instruction queue in the vector transfer unit. Program instructions for performing a burst transfer include determining the starting address of the vector data to be transferred, the ending address of the vector data to be transferred, and whether the ending address of the vector data to be transferred is within the same virtual memory page as the starting address. The ending address of the vector data to be transferred is determined based on the number of data elements to be transferred, the stride of the vector data to be transferred, and the width of the vector data elements to be transferred. When the amount of data to be transferred is divisible by a factor of two, the multiplication of the stride and width of the data elements is carried out by shifting. An address error exception occurs when the ending address of the vector data to be transferred is not within the same virtual memory page as the starting address. The ending address of the vector data to be transferred is determined in parallel with determining the starting address of the vector data to be transferred.
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Campbell Stephenson LLP
Ellis Richard
NEC Electronics America, Inc.
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