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TLB miss fault handler and method for accessing multiple...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate

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TLB operation based on task-ID

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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TLB operations based on shared bit

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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TLB using region ID prevalidation

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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TLB with resource ID field

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Toggle for split transaction mode of PCI-X bridge buffer

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Token based cache-coherence protocol

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Token mechanism for cache-line replacement within a cache memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Token mechanism for cache-line replacement within a cache...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Token-based serialisation of instructions in a multiprocessor sy

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Tool for disk image replication

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Tool for identifying causes of memory leaks

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Top/bottom symmetrical protection scheme for flash

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Top/bottom symmetrical protection scheme for flash

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Top/bottom symmetrical protection scheme for flash

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Topological data categorization and formatting for a mass...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Toy electronic information storage medium

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent

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Trace based deallocation of entries in a versioning cache...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Trace based instruction caching

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Trace based instruction caching

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Dynamic-type storage device
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