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Techniques to asynchronously operate a synchronous memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Techniques to manage a flow cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Techniques to map cache data to memory arrays

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Techniques to truncate data files in nonvolatile memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Telecommunication device, more particularly, mobile radio termin

Electrical computers and digital processing systems: memory – Address formation – Address multiplexing or address bus manipulation
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Temperature control to reduce cascade failures in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Terminal for use in a system interfacing with storage media

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Ternary CAM with software programmable cache policies

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Ternary content addressable memory device

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Ternary content addressable memory with enhanced priority...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Test driver for use in validating a circuit design

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Test mode accessing of an internal cache memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Testing data transfer time of disk drives in consumer...

Electrical computers and digital processing systems: memory – Storage accessing and control
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Testing for operating life of a memory device with address...

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
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Testing memories

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
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Thin provisioning of a file system and an iSCSI LUN through...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Thread local cache memory allocator in a multitasking...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Thread switch on blocked load or store using instruction thread

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Thread synchronization in a computer controlled by an object-bas

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Virtual machine memory addressing
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Thread-local synchronization construct cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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