Techniques to map cache data to memory arrays

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules

Reexamination Certificate

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C711S003000, C711S128000, C365S230020, C365S230030, C365S239000

Reexamination Certificate

active

06954822

ABSTRACT:
Methods and apparatuses for mapping cache contents to memory arrays. In one embodiment, an apparatus includes a processor portion and a cache controller that maps the cache ways to memory banks. In one embodiment, each bank includes data from one cache way. In another embodiment, each bank includes data from each way. In another embodiment, memory array banks contain data corresponding to sequential cache lines.

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