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Reducing memory latency by not performing bank conflict...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Reducing micro-controller access time to data stored in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Reducing number of rejected snoop requests by extending time...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Reducing number of rejected snoop requests by extending time...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Reducing operating system start-up/boot time through disk block

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Reducing power consumption in a sequential cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Reducing power in a snooping cache based multiprocessor...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Reducing power-on time by simulating operating system memory...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Reducing probe traffic in multiprocessor systems

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Reducing probe traffic in multiprocessor systems using a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Reducing read cycle of memory read request for data to be...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Reducing resource collisions associated with memory units in...

Electrical computers and digital processing systems: memory – Address formation – Hashing
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Reducing resource consumption by ineffective write operations

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Reducing snoop response time for snoopers without copies of...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Reducing tag-ram accesses and accelerating cache operation...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Reducing the format time for bit alterable memories

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Reducing the number of block masks required for programming...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Reducing transitions on address buses using...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Reduction of bank switching instructions in main memory of...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Reduction of bus switching activity using an encoder and...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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