Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2007-11-13
2007-11-13
Peugh, Brian R. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S141000
Reexamination Certificate
active
10966161
ABSTRACT:
A computer system having a plurality of processing nodes interconnected by a first point-to-point architecture is described. Each processing node has a cache memory associated therewith. A probe filtering unit is operable to receive probes corresponding to memory lines from the processing nodes and to transmit the probes only to selected ones of the processing nodes with reference to probe filtering information. The probe filtering information is representative of states associated with selected ones of the cache memories.
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Glasco David B.
Khaleel Adnan
Kota Rajesh
Morton Eric
Beyer & Weaver, LLP
Newisys Inc.
Peugh Brian R.
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