Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2007-07-24
2007-07-24
Shah, Sanjiv (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S100000, C711S108000, C718S100000, C718S102000, C718S103000, C718S104000, C370S395700, C370S395720, C370S411000, C370S412000, C370S413000, C370S414000, C370S415000, C370S416000, C719S320000
Reexamination Certificate
active
10791632
ABSTRACT:
Mechanisms for reducing the number of block masks required for programming multiple access control lists in an associative memory are disclosed. A combined ordering of masks corresponding to multiple access control lists (ACLs) is typically identified, with the multiple ACLs including n ACLs. An n-dimensional array is generated, wherein each axis of the n-dimensional array corresponds to masks in their requisite order of a different one of the multiple ACLs. The n-dimensional array progressively identifies numbers of different masks required for subset orderings of masks required for subsets of the multiple ACLs. The n-dimensional array is traversed to identify a sequence of masks corresponding to a single ordering of masks including masks required for each of the multiple ACLs.
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Agarwal Amit
Chen Qizhong
Pullela Venkateshwar Rao
Cisco Technology Inc.
Li Zhuo H.
Shah Sanjiv
The Law Office of Kirk D. Williams
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