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Multi-section cache with different attributes for each section

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multi-sequence burst accessing for SDRAM

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
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Multi-session optical media and methods for recording

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Multi-set block erase

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Multi-site remote-copy system

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Multi-site remote-copy system

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Multi-site remote-copy system

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Multi-socket symmetric multiprocessing (SMP) system for chip...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multi-socket symmetric multiprocessing (SMP) system for chip...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multi-stack memory architecture

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multi-stack-caching memory architecture

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multi-stage data buffers having efficient data transfer...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Multi-stream associative memory architecture for computer...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Multi-stream coherent memory controller apparatus and method

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Multi-stride prefetcher with a recurring prefetch table

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multi-tag system and method for cache read/write

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multi-threaded embedded processor using deterministic...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multi-threaded random access storage device qualification tool

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Multi-threaded read ahead prediction by pattern recognition

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Multi-tier cache and method for implementing such a system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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