Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-12-29
2000-05-30
Lane, Jack A.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711213, 711217, G06F 1208
Patent
active
060702303
ABSTRACT:
The inventive prediction mechanism constructs a time ordered state space of the file accesses, and then searches the state space looking for file accesses that form either sequential or stride patterns. A cache is maintained to store information about existing patterns. The mechanism will review the cache to determine if a new access request is a continuation of an existing pattern before searching the entire state space for a new pattern. If the request is either a continuation of an existing pattern or forms a new pattern, then a read ahead is issued for the next block in the pattern. The cache and the state space are updated as each request arrives. The mechanism uses a trigger array to prevent the re-issuing of predictions. The mechanism also has a strength feature which is an indication how many times the pattern has been continued, and can be used by the operating system in deciding how many read aheads should be issued.
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patent: 5357618 (1994-10-01), Mirza et al.
patent: 5568651 (1996-10-01), Medina et al.
patent: 5694568 (1997-12-01), Harrison, III et al.
patent: 5822790 (1998-10-01), Mehrotra
Hewlett--Packard Company
Lane Jack A.
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