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Method for reducing an importance level of a cache line

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Method for reducing cache conflict misses

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Method for reducing coherence enforcement by selective...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Method for reducing directory writes and latency in a high...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Method for reducing number of bits used in storage of instructio

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
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Method for reducing number of writes in a cache memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Method for reducing pin counts and microprocessor using the...

Electrical computers and digital processing systems: memory – Address formation – Address multiplexing or address bus manipulation
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Method for reducing power consumption in a set associative cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Method for reducing power consumption through dynamic memory...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Method for reducing the frequency of cache misses in a computer

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Method for reducing the memory requirements for an...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Method for reducing the number of coherency cycles within a dire

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Method for refreshing a dynamic memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Method for refreshing stored data in an electrically...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Method for regenerating data in disk array

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Method for reliably verifying a memory area of a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Method for reorganizing additional writing format storage...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Method for replicating snapshot volumes between storage systems

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Method for replicating snapshot volumes between storage systems

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Method for replicating snapshot volumes between storage systems

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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