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Central processing unit including address generation system...

Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment
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Centralized cache storage for runtime systems

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Centralized memory allocation with write pointer drift...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Centralized storage management method

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Chained array of sequential access memories enabling...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Chained cache coherency states for sequential homogeneous...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Chained cache coherency states for sequential...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Chained DMA devices for crossing common buses

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Chaining directory reads and writes to reduce DRAM bandwidth...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Chaining of blocks for optimal performance with DASD (Direct...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Changing a mode of a storage subsystem in a system

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Changing page size in storage media of computer system

Electrical computers and digital processing systems: memory – Address formation – Slip control – misaligning – boundary alignment
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Channel-based late race resolution mechanism for a computer...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Checking for proper locations of storage devices in a storage de

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Checkpoint acquisition accelerating apparatus

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Checkpoint and consistency markers

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Checkpoint restart method and apparatus utilizing multiple log m

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Chip card comprising means and method for managing a virtual...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Chip card with integrated circuit

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Chip card with integrated circuit

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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