Centralized memory allocation with write pointer drift...

Details Centralized memory allocation with write pointer drift... Centralized memory allocation with write pointer drift...

2006-04-18

2006-04-18

Peikari, B. James (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

Reexamination Certificate

active

07032082

ABSTRACT:
A system for writing data includes a memory, at least one memory controller and control logic. The memory stores data units. The memory controller receives a write request associated with a data unit and stores the data unit in the memory. The memory controller also transmits a reply that includes an address where the data unit is stored. The control logic receives the reply and determines whether the address in the reply differs from an address included in replies associated with other memory controllers by a threshold amount. When this occurs, the control logic performs a corrective action to bring an address associated with the memory controller back within a defined range.

REFERENCES:
patent: 5974480 (1999-10-01), Qureshi et al.
patent: 6145027 (2000-11-01), Seshan et al.
patent: 2003/0156093 (2003-08-01), Niida et al.

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