Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-06-18
1998-10-27
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711 3, 711142, 711143, 711147, 395181, 39518211, 39518214, 39518215, G06F 1134
Patent
active
058288210
ABSTRACT:
Log memories for recording updated history of a main memory are provided. CPUs record the updated history of the main memory to either of the log memories and writes context thereof and content of a cache memory to the main memory at a checkpoint acquisition. The updated history of the main memory is switched from one of CPUs that has finished a checkpoint processing to other one of the log memories in which the CPUs do not use to record the updated history of the main memory. Normal processing is restarted without waiting for finishing the checkpoint acquisition of the other ones of CPUs.
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Fujii Takahiro
Hirayama Hideaki
Hoshina Satoshi
Masubuchi Yoshio
Ohmori Shigefumi
Chan Eddie P.
Kabushiki Kaisha Toshiba
Nguyen Than V.
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