Two-hop source snoop based cache coherence protocol
Two-level instruction cache for embedded processors
Two-level operating system architecture
Two-level RAM lookup table for block and page allocation and...
Two-phase snap copy
Two-sided, dynamic cache injection control
Two-stage request protocol for accessing remote memory data...
Two-way cache system and method for interfacing a memory...
Unbalanced inclusive tags
Unified data sets distributed over multiple I/O-device arrays
Unified data sets distributed over multiple I/O-device arrays
Unified memory controller
Unified memory hard disk drive system
Unified memory system architecture including cache and...
Unified memory system for multiple processors and method for...
Unified multilevel memory system architecture which supports...
Unified re-map and cache-index table with dual write-counters fo
Uniform coding system for a flash memory
Unifying data storage in a distributed network
Unique identifier for optical media