Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-08-09
2005-08-09
Anderson, Matthew D. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S145000
Reexamination Certificate
active
06928522
ABSTRACT:
The disclosed embodiments may relate to cache memory systems. A multiprocessor computer system may include multiple processors and caches that may be organized in a hierarchical configuration. The caches may be organized into lines and include data and cache tags. Due to the limitations in the system architecture, the lower level caches may be limited in size, which may not be able to maintain the inclusion property. By including the unbalanced inclusion caches tags, a request for data within list from other components, such as other processors, may be handled without interacting with the upper level caches.
REFERENCES:
patent: 6615322 (2003-09-01), Arimilli et al.
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