Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-01-13
2009-06-02
Sough, Hyung S (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S140000, C711S145000, C711S146000
Reexamination Certificate
active
07543115
ABSTRACT:
A method for cache coherency in a network of a plurality of caching agents includes storing a plurality of miss requests, transmitting the miss requests into the network, sending a probe message on a probe channel and a request message on a second channel from one of the plurality of caching agents, and maintaining an open status for the miss request until the requesting cache agent receives the data or an ownership indicator.
REFERENCES:
patent: 6009488 (1999-12-01), Kavipurapu
patent: 6018791 (2000-01-01), Arimilli et al.
patent: 6922756 (2005-07-01), Hum et al.
patent: 6950438 (2005-09-01), Owen et al.
patent: 2005/0160132 (2005-07-01), Van Doren et al.
patent: 2005/0160237 (2005-07-01), Tierney et al.
patent: 2005/0262250 (2005-11-01), Batson et al.
U.S. Appl. No. 10/833,963, filed Apr. 27, 2004 entitled “A Two-Hop Cache Coherency Protocol”.
Batson Brannon
Tsien Benjamin
Welch William A.
Intel Corporation
Patel Kaushikkumar
Sough Hyung S
Trop Pruner & Hu P.C.
LandOfFree
Two-hop source snoop based cache coherence protocol does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Two-hop source snoop based cache coherence protocol, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Two-hop source snoop based cache coherence protocol will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4138541