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Mechanism for dynamically-allocated variables in an...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Mechanism for effectively caching streaming and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for efficient low priority write draining

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Mechanism for ensuring data coherency during sequential...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for folding storage barrier operations in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for handling conflicts in a multi-node computer...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for handling explicit writeback in a cache...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Mechanism for handling explicit writeback in a cache...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Mechanism for handling I/O transactions with known...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for high performance transfer of speculative...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for incremental backup of on-line files

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Mechanism for initiating an implicit write-back in response...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for invalidating instruction cache blocks in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for maintaining cache consistency in computer systems

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for managing an object cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for managing offset and aliasing conditions within a c

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for optimizing generation of commit-signals in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Mechanism for performing loitering trace of objects that...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Mechanism for providing early coherency detection to enable...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Mechanism for proxy management of multiprocessor storage...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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