Absolute address history table index generation for predicting i

Details Absolute address history table index generation for predicting i Absolute address history table index generation for predicting i

1998-04-30

2000-10-24

Kim, Kenneth S.

Electrical computers and digital processing systems: memory

Address formation

Address mapping

711 3, 711205, 711206, 711207, G06F 1210

Patent

active

06138223&

ABSTRACT:
A computer processor that uses an AAHT to provide a guess at the real (absolute) address bits used to access the cache and directories that is more accurate in a high-frequency design which prevents any sort of full or large partial adds of ranges of base, index, or displacement has two index values generated and two AAHT arrays, one each for instruction and operand logical requests. It handles cases in which the data is not directly from the GPR array. For designs that aim at improving performance data for some operations that update GPR's may be used for address generation prior to the execution and write to the GPR array, these include data bypass for Load Address (LA) and Load (L). The system handles instruction fetches, relative branches, other special instruction address instruction fetch requests, and those started as a result of a branch history table (BHT) predicted instruction fetch. A method for AAHT synonym resolution improves the accuracy of the index value for an Absolute Address History Table buffer.

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