Clock distribution in a circuit emulator

Clock gating analyzing apparatus, clock gating analyzing...

Clock generation and distribution in an emulation system

Closed-loop modeling of gate leakage for fast simulators

Cluster availability model

Clustered processors in an emulation engine

Clustered processors in an emulation engine

Co-simulation interface

Co-simulation interface

Co-simulation verilog/PLI and system C modules using remote...

Co-simulation via boundary scan interface

Code generation for data acquisition and/or logging in a...

Code translation between hardware design languages

Code type control of caching parameters

Coherent state among multiple simulation models in an EDA...

Coherent state among multiple simulation models in an EDA...

Collaboration session recording model

Collaboration session recording model

Collecting and exporting on-chip data processor trace and...

Collecting and exporting on-chip data processor trace and...