Closed-loop modeling of gate leakage for fast simulators

Details Closed-loop modeling of gate leakage for fast simulators Closed-loop modeling of gate leakage for fast simulators

2011-02-08

2011-02-08

Silver, David (Department: 2128)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

C703S014000

Reexamination Certificate

active

07885798

ABSTRACT:
A method for circuit simulation using a netlist in which a first device having an unmodeled, nonlinear behavior is modified by inserting a second device which has a nonlinear response approximating the unmodeled nonlinear behavior. The first device may be for example a first transistor and the second device may be a variable current source, in particular one whose current is modeled after a floating transistor template which represents gate leakage current of the first transistor (gate-to-source or gate-to-drain). During simulation of the circuit a parameter such as a gate-to-source voltage of the second transistor is controlled to model gate leakage. The model parameters can be a function of an effective quantum mechanical oxide thickness value of a gate of the first transistor technology.

REFERENCES:
patent: 5404319 (1995-04-01), Smith et al.
patent: 6718524 (2004-04-01), Mbouombouo
patent: 7149674 (2006-12-01), Sirichotiyakul et al.
patent: 2005/0125761 (2005-06-01), Jacobson et al.
R. Rao at al., “Efficient Techniques for Gate Leakage Estimation,” Proceedings of the 2003 Intl. Symp. on Low power Elec. and Design, pp. 100-103 (2003).
W. Liu et al., “BSIM3v3.3 MOSFET Model Users' Manual,” Dept. of EE and CS University of California (2005).

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