IC element layout data display system
IC layout buffer insertion method
IC layout having topological routes
IC layout optimization to improve yield
IC layout physical verification method
IC layout system employing a hierarchical database by...
IC layout system having separate trial and detailed routing...
IC layout with non-quadrilateral Steiner points
IC layouts with at least one layer that has more than one...
IC package similar IDE interface solid state disk module and...
IC signal path resistance estimation method
IC substrate noise modeling including extracted capacitance...
IC substrate noise modeling with improved surface gridding...
IC that efficiently replicates a function to save logic and...
IC tiling pattern method, IC so formed and analysis method
IC timing analysis with known false paths
Identification and implementation of clock gating in the...
Identification means
Identification of an integrated circuit from its physical...
Identification of voltage reference errors in PCB designs