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Mask pattern data generating method, information processing...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
Reexamination Certificate

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Method and system for a pattern layout split

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
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Method for designing mask including forming a mesh dummy...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
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Method for layout of random via arrays in the presence of...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
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Method for selectively amending layout patterns

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
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Method for time-evolving rectilinear contours representing...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
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Method of arranging mask patterns and apparatus using the...

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
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Method of performing mask-writer tuning and optimization

Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
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