Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Layout generation
Reexamination Certificate
2008-08-07
2011-10-18
Memula, Suresh (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Design of semiconductor mask or reticle
Layout generation
C716S053000, C716S054000
Reexamination Certificate
active
08042069
ABSTRACT:
A method to selectively amend a layout pattern is disclosed. First, a layout pattern including at least a first group and a second group is provided, wherein each one of the first group and the second group respectively includes multiple members. Second, a simulation procedure and an amendment procedure are respectively performed on all the members of the first group and the second group to obtain an amended first group and an amended second group. Then, the amended first group and the amended second group are verified as being on target or not. Afterwards, the layout pattern including the on target amended first group and the on target amended second group is output.
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Chen Lun-Hung
Cheng Yung-Feng
Huang Hsiang-Yun
Kuo Hui-Fang
Kuo Shih-Ming
Hsu Winston
Margo Scott
Memula Suresh
United Microelectronics Corp.
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