Method to form a corrugated structure for enhanced capacitance
Method to form a self-aligned CMOS inverter using vertical...
Method to form both high and low-k materials over the same...
Method to form both high and low-k materials over the same...
Method to form etch and/or CMP stop layers
Method to form hemispherical grain (HSG) silicon by implant seed
Method to form hemispherical grained polysilicon
Method to improve buried contact resistance
Method to improve drive current by increasing the effective...
Method to improve LDD corner control with an in-situ film...
Method to improve the capacity of data retention and...
Method to improve the coupling ratio of top gate to floating...
Method to improve writer leakage in SiGe bipolar device
Method to improve yield and simplify operation of polymer...
Method to increase conversion gain of an active pixel, and...
Method to increase coupling ratio of source to floating gate...
Method to increase coupling ratio of source to floating gate...
Method to reduce gate oxide damage due to non-uniform plasmas in
Method to reduce gate-to-local interconnect capacitance using a
Method to remove an oxide seam along gate stack edge, when...