Structures of a low-voltage-operative non-volatile ferroelectric

Structures, methods, and systems for ferroelectric memory...

STT-MRAM bit cell having a rectangular bottom electrode...

Stuck-at defect condition repair for a non-volatile memory cell

Substrate-fed injection-coupled memory

Superconducting circuit for high-speed lookup table

Superconducting circuit for high-speed lookup table

Superconducting fault-tolerant programmable memory cell incorpor

Superconducting magnetic memory device having intentionally indu

Superconducting magnetoresistive memory element using...

Superconducting memory array configurations which avoid spurious

Superconducting memory cell with directly-coupled readout

Superconducting memory circuit and method of storing information

Superconducting optically reconfigurable magnetic device

Superconducting read-only memories or programable logic arrays h

Superconducting switching circuit, memory cell and memory circui

Superconductive latch circuit

Superconductor magnetic memory cell and method for accessing the

Superconductor-semiconductor hybrid memory circuits with superco

Suppression of leakage currents in VLSI logic and memory...