Static information storage and retrieval – Systems using particular element – Magnetoresistive
Reexamination Certificate
1999-10-20
2001-05-15
Nelms, David (Department: 2818)
Static information storage and retrieval
Systems using particular element
Magnetoresistive
C365S171000, C365S173000
Reexamination Certificate
active
06233171
ABSTRACT:
FIELD OF THE INVENTION
The current invention relates to magnetoresistive nonvolatile memory elements. More specifically the invention relates to a method to alter a conductivity of a superconducting signal layer between a resistive and non-resistive state.
BACKGROUND OF THE INVENTION
Data storage devices become more and more the weak link due to the ever increasing operational speed of computers. Regular hard disk drives with their affiliated masses do not provide sufficiently low read and write access time and data transfer rates to meet the demands for intermediate and permanent information storage.
As a result, random access memory (RAM) has been developed, that takes on the task of temporary information storage. Modern operating systems are designed to fulfill multiple operations quasi simultaneously, an ability commonly referred to as multitasking. Since the central processor unit (CPU) of a conventional computer has a limited processing capacity, multitasking is mainly performed in a serial mode. A number of temporary files is thereby created that have to be accessed altered repeatedly. All this happens in very short time intervals such that it appears simultaneously to an operator. RAM with its short access time and high data transfer rates makes it predestinated to accomplish the intermediate data storing.
The fast progressing development of RAM brings their storing capacity more and more close to that of hard disk drives and they become attractive to be used also for permanent data storing. Since conventional RAM operates after the principles of a transistor it needs power supply to keep the stored data. This characteristic is the main obstacle to utilize conventional RAM as a permanent storage device. To bypass this problem, magnetic random access memory (MRAM) is being developed as for instance giant magnetoresistive memory devices and others. Giant magnetoresitive memory devices typically utilize a memory cell consisting out of a magnetoresistive signal layer and two magnetized layers that can be magnetized either in same or in opposing direction. The two individual magnetizations sum thereby to either a maximum or to a minimum and alter the resistance of the adjacent signal layer correspondingly. The resistance level in the signal layer is utilized to retrieve an information about the magnetic state of the two magnetic layers induced during a writing operation.
The utilized magnetic materials have a certain magnetic persistence to assure the storage state over a sufficient time period.
Unfortunately the operating principle of giant magnetoresitive memory devices provides inconsistent levels of the retrieved signals. There mainly to reasons for that: 1) the highly proportional dependency of the resistance level in the signal layer to the sum magnetic field of the two magnetoresistive layers. This is for instance caused by material inconsistencies or by declining magnetic field strength. 2) The memory cells have to be arrayed in matrices with increasing size to provide sufficient storage capacity. With increasing sizes, resistance in the support lines is also increasing, which alters the write efficiency resulting in lower initial magnetic field strength. A read signal sent via the extended support lines is additionally affected by the increased resistance.
Therefore exists a need for a magnetoresistive memory element, that provides a stabile signaling level independent of the varying length of the support lines. The current invention addresses this need, in particular for application in combination with cuperconducting logic circuits.
The U.S. Pat. No. 5,276,639 discloses a superconductor magnetic memory cell and method for accessing the same. The invention discloses a memory cell operating similar to the configuration of the giant magnetoresistive memory element. The main difference is that it utilizes the Josephson junction instead of a conventional resistive signal layer to recognize the level of summed magnetic field. Separate support lines responsible for the write operation are superconductors. The Josephson Junction placed atop the magnetoresistive layers has an increased sensitivity, which results together with the resistance free condition in the support lines to an improved performance characteristic of a MRAM built according to the principles of this invention. Never the less, the proportional dependency between field strength of the sum magnetic field and the signal level in the SMS Josephson junction remains as a hampering influence. In addition, the Josephson Junction adds significantly complexity to the memory cell.
Therefore exists a need for a simple magnetoresistive memory element that utilizes the principles of a Josephson Junction and retrieves a signal highly independent of magnetic field strength variations in the magnetoresistive layers. The current invention addresses this need.<
M. G. Forrester, J. X. Przybysz, J. Talvacchio, J. Kang, A. Davidson, J. R. Gavalar disclose in the IEEE, Trans. Appl. Supercon, 5, 3401 (1995) a Josephson Junction memory circuit based on fluxoid quantization. Following the principles disclosed in this paper only relatively small memories were sucessfully fabricated.
Therefore, alternative memory concepts are needed that allow the fabrication of large MRAM devices. The current invention addresses this need.
OBJECTS AND ADVANTAGES
Accordingly, it is a primary object of the present invention to provide a nonvolatile magnetoresistive memory element that utilizes principles according to the superconductor/ferromagnet proximity effect.
It is another object of the present invention, to provide a read signal leveled independently of magnetic field strength variations of the sum magnetic field.
It is a further object of the present invention, to provide a memory concept based on principles of superconductivity, that allow the fabrication of large sized memories.
SUMMARY OF THE INVENTION
The invention utilizes the superconducting/magnetic metal proximity effect (SMPE) to change the critical temperature in the superconductor below or above an operational temperature of the device. Above the critical temperature the superconductor turns into a regular resistive conductor that attenuates a passing read signal according to ohm's law. Below the critical temperature the superconductor remains its superconducting properties up to a critical current flow.
In ferromagnetic materials the SMPE is predicted to occur with an oscillatory decay of the pair wavefunction, compared to a typically exponential decay for nonferromagnetic materials. The invention provides a theoretical analysis of the parameters, which are responsible for the decay length. It is favorable to have the decay length to a maximum in order to increase the critical bandwidth in relation to the achievable sum magnetic field variation. A sum parameter is introduced that combines the predicted required characteristics of favorable ferromagnetic layer material. These required characteristics are mainly a low Curie temperature or equivlently a low exchange field.
An inventive memory element utilizing the oscillatory decay has a design schema very similar to a regular giant magnetoresistive memory element (GME) as it is well known to those skilled in the art. Magnetic fields are induced by a x-conductor and a y-conductor onto the ferromagnetic layers. They are magnetized such that their resulting field sums to either a high sum magnetization or a low sum magnetization according to the status of the write signal. Different levels of the sum magnetization versus difference magnetization change details of the decaying oscillations in the combined magnetic layers. As a result, the critical temperature changes through the action of the proximity effect.
The memory device is operated at a temperature within the critical temperature bandwidth and is typically around 10K. A typical critical temperature bandwidth is predicted with approximately 2K to 3K.
In a supporting circuitry a signal pulse is provided via the x-conductor and the y-conductor. Due to the low operation te
Beasley Malcolm R.
Youm Dojun
Lam David
Luman Intellectual Property Services, Inc.
Nelms David
The Board of Trustees of the Leland Stanford Junior University
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