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Apparatus for controlling outputs of read data in a semiconducto

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Apparatus for decoding addresses

Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent

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Apparatus for driving output signals from DLL circuit

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Apparatus for expanding the memory of a mini-computer system

Static information storage and retrieval – Addressing
Patent

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Apparatus for externally timing high voltage cycles of non-volat

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Apparatus for externally timing high voltage cycles of...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Apparatus for externally timing high voltage cycles of...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Apparatus for externally timing high voltage cycles of...

Static information storage and retrieval – Addressing – Sync/clocking
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Apparatus for externally timing high voltage cycles of...

Static information storage and retrieval – Addressing – Sync/clocking
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Apparatus for flexible deactivation of word lines of dynamic...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Apparatus for generating a data stream

Static information storage and retrieval – Addressing – Sync/clocking
Patent

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Apparatus for generating data strobe signal applicable to...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Apparatus for generating memory-internal command signals...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Apparatus for generating write control signals applicable to...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Apparatus for implementing multiple integrated circuits...

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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Apparatus for latency specific duty cycle correction

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Apparatus for latency specific duty cycle correction

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Apparatus for pipe latch control circuit in synchronous...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Apparatus for processing data, memory bank used therefor,...

Static information storage and retrieval – Addressing – Sequential
Reexamination Certificate

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Apparatus for processing data, memory bank used therefor,...

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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