Apparatus for implementing multiple integrated circuits...

Details Apparatus for implementing multiple integrated circuits... Apparatus for implementing multiple integrated circuits...

2011-03-29

2011-03-29

Tran, Tan N (Department: 2826)

Static information storage and retrieval

Addressing

Plural blocks or banks

C257S499000, C257S506000, C365S227000, C365S185110

Reexamination Certificate

active

07916571

ABSTRACT:
An apparatus comprising plurality of functional integrated circuit blocks, each manufactured with different oxide thicknesses on a monolithic integrated circuit die, is described. Using different gate oxide thicknesses for different functional integrated circuit blocks provides reduced power consumption and increases performance in processing systems. Several embodiments comprising different combinations of functional integrated circuit blocks, including processor cores and memory elements, are presented.

REFERENCES:
patent: 6770940 (2004-08-01), Yamauchi
patent: 6891210 (2005-05-01), Akiyama
patent: 7248533 (2007-07-01), Aimoto
patent: 2007/0136617 (2007-06-01), Kanno et al.
International Search Report—PCT/US09/043342, International Search Authority—European Patent Office—Jul. 27, 2009.
Written Opinion—PCT/US09/043342, International Search Authority—European Patent Office—Jul. 27, 2009.
G.C-F Yeap, F. Nkansah, J. Chen, S. Jallepalli, D. Pham, T. Lii, A. Nangia, P.Le, D. Hall, D. Menke, J. Sun, A. Das, P. Gilbert, F. Huang, J. Sturtevant, K. Green, J. Lu, J. Benavidas, E. Banks, J. Chung, and C. Lage; A 180nm Copper/Low-k CMOS Technology with Dual Gate Oxide Optimized for Low Power and Low Cost Consumer Wireless Applications; 2000 Symposium on VLSI Technology Digest of Technical Papers; pp. 150-151; 2000 IEEE.

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