System and method for generating multiple clock signals
System and method for generating two effective frequencies...
System and method for generating two effective frequencies...
System and method for grouped gating control logic
System and method for implementing a digital phase-locked loop
System and method for implementing a micro-stepping delay...
System and method for implementing a micro-stepping delay...
System and method for implementing a skew-tolerant...
System and method for implementing soft power up
System and method for improved timing synchronization
System and method for increasing effective pulse-width...
System and method for local generation of a ratio clock
System and method for monitoring a power supply level
System and method for multiple chip self-aligning clock distribu
System and method for multiple-phase clock generation
System and method for on/off-chip characterization of...
System and method for open-loop synthesis of output clock...
System and method for open-loop synthesis of output clock...
System and method for phase alignment of a plurality of...
System and method for PLL control