System and method for open-loop synthesis of output clock...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating

Reexamination Certificate

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C327S293000

Reexamination Certificate

active

11433216

ABSTRACT:
Delay circuits are used in a manner similar to a synchronized mirror delay circuit to generate a quadrature clock signal from an input clock signal. The input clock signal is coupled through a series of first delay circuit for one-half the period of the input clock signal. A second series of feedback delay circuits mirror respective first delay circuits. After the input signal has been coupled through the first delay circuits, the mirrored signals from the first delay circuits are coupled through the feedback delay circuits. The delay of the feedback delay circuits is one-half the delay of the first delay circuits to provide a signal that is the quadrature of the clock signal.

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Applicant would like to make known to the Patent and Trademark Office that an U.S. Appl. No. 11/430,471, describing and claiming subject matter that is similar to the subject matter of this application, was filed on May 8, 2006. This related application, as well as any prior art cited therein, may be material to the examination of this application. A copy of this related application as filed is submitted herewith in accordance with 37 C.F.R. § 1.98(d).

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