System and method for multiple chip self-aligning clock distribu

Details System and method for multiple chip self-aligning clock distribu System and method for multiple chip self-aligning clock distribu

1997-12-04

1999-12-21

Wells, Kenneth B.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327163, 327295, H03L 700

Patent

active

06005428&

ABSTRACT:
A multiple chip self-aligning clock distribution system. The clock signal provided to any given chip is delayed by the on-chip distribution time of every other chip with which it is to be synchronized. Equal delay paths are added to each chip which provide a delay equal to the clock distribution delay of the chip. The equal delay paths can comprise a series of logic gates, such as for example inverters. The clock distribution delay of the equal delay path is designed to be equal to the clock distribution delay of the clock distribution tree on the chip. For each chip to be synchronized, the clock signal is routed through an equal delay path on each of the other chips to be synchronized before being coupled to the clock distribution input terminal of the destination chip. The number of equal delay paths that is included on each chip is a function of the number of chips to be synchronized. "N" equal delay paths are used where the number of chips is greater than 2.sup.N-1 and is less than or equal to 2.sup.N. Process variations that affect the clock distribution delay of the logic on the chip are likely to have a similar effect on the clock distribution delay of the equal delay path. This minimizes the effect of process variations on the clock alignment in the system.

REFERENCES:
patent: 4860322 (1989-08-01), Lloyd
patent: 5122679 (1992-06-01), Ishii et al.
patent: 5565816 (1996-10-01), Coteus

Affiliated with

Also associated with

Rating

System and method for multiple chip self-aligning clock distribu does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for multiple chip self-aligning clock distribu, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for multiple chip self-aligning clock distribu will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-508784