System and method for PLL control

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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C327S160000

Reexamination Certificate

active

11137078

ABSTRACT:
Systems and methods for reducing the effects of the operation of logic on a phase-locked loop (PLL) circuit are disclosed. These systems and methods may allow a PLL circuit to compensate for the anticipated effects of an instruction before, substantially simultaneously with, or after the execution of the instruction. More particularly, logic associated with the issue of instructions in a system may provide a signal to a PLL in the system based on an instruction. The PLL may then be adjusted to compensate for the anticipated effects of the instruction based on this control signal.

REFERENCES:
patent: 5987085 (1999-11-01), Anderson
patent: 6373314 (2002-04-01), Oda
patent: 6829318 (2004-12-01), Kawahara
patent: 6903587 (2005-06-01), Sasaki et al.
patent: 6989718 (2006-01-01), Pretl et al.
patent: 7064617 (2006-06-01), Hein et al.

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