Common-bias and differential structure based DLL
Communication systems w/counter-based frequency centering...
Compensating for differences between clock signals
Compensating for leakage currents in loop filter capacitors...
Compensation circuit for fractional-N frequency PLL synthesizer
Compensation circuit for low phase offset for phase-locked...
Compensation for a delay locked loop
Compensation for a delay locked loop
Compensation of phase lock loop (PLL) phase distribution...
Compensator for leakage through loop filter capacitors in...
Conditioned and robust ultra-low power power-on reset...
Conditioned and robust ultra-low power power-on reset...
Configurable architecture hybrid analog/digital delay locked...
Configurable circuit structure having reduced susceptibility...
Configurable enabling pulse clock generation for multiple...
Configuration for generating a clock including a delay...
Constant phase angle control for frequency agile power...
Constant phase angle control for frequency agile power...
Control circuit and semiconductor integrated circuit device
Control circuit for command signals of clock generator