Conditioned and robust ultra-low power power-on reset...
Configurable architecture hybrid analog/digital delay locked...
Configurable circuit structure having reduced susceptibility...
Configurable enabling pulse clock generation for multiple...
Configuration for generating a clock including a delay...
Constant phase angle control for frequency agile power...
Constant phase angle control for frequency agile power...
Control circuit and semiconductor integrated circuit device
Control circuit for command signals of clock generator
Control of a variable delay line using line entry point to...
Control of a variable delay line using line entry point to...
Control signal generating device for driving a plurality of...
Control signal generation for a low jitter...
Controllable current source circuit and a phase locked loop...
Controllable current source for a phase locked loop
Controlled slew reference switch for a phase locked loop
Core clock correction in a 2/N mode clocking scheme
Core clock correction in a 2/n mode clocking scheme
Current detection start-up circuit for reference voltage circuit
Current mirror triggered power-on-reset circuit