Two stage date packet processing scheme
Two stage detector having viterbi detector matched to a...
Two stage detector having viterbi detector matched to a...
Two stage S—Random interleaver
Two-dimensional interleaving in a modem pool environment
Two-dimensional printed code for storing biometric...
Two-dimensional redundancy calculation
Two-dimensional storage array with prompt parity in one...
Two-MCU system and hang-up detecting method of MCU
Two-phase clock-stalling technique for error detection and...
Two-phase data-transfer protocol
Two-phase root cause analysis
Two-stage detection of trace identifier mismatches
Two-wire interface having embedded per frame reliability...
Ultra reliable disk memory for duplex processor platforms
Ultra reliable disk memory for multi-processor platforms
Uncorrectable error detection utilizing complementary test...
Undo/redo algorithm for a computer program
Unequal error protection apparatus, systems, and methods
Unequal error protection for digital broadcasting using...