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Simultaneous switch test mode

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Simultaneous writing and reconstruction of a redundant array...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Simultaneously driving a hardware device and a software...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Simultaneously multithreaded processing and single event...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Simultaneously multithreaded processing and single event...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Single bit error correction, double burst error detection...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Single board DFT integrated circuit tester

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Single burst error correction

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Single chip processor with externally executed test function

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Single chip systems using general purpose processors

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Single clock cycle CRC engine

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Single cycle cyclic redundancy checker/generator

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Single engine turbo decoder with single frame size buffer...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Single engine turbo decoder with single frame size buffer...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Single engine turbo decoder with single frame size buffer...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Single error Reed-Solomon decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Single event functional interrupt detection system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Single event upset tolerant microprocessor architecture

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Single event upset tolerant system and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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Single I/O session to commit a single transaction

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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