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CMOS pull-up input network

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Patent

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Compensated input receiver with controlled switch-point

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Patent

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Compensation circuit for driver circuits

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Reexamination Certificate

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Correction for circuit self-heating

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Reexamination Certificate

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CPLD for multi-wire keyboard decode with timed power control...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Reexamination Certificate

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CPLD with multi-function blocks and distributed memory

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Reexamination Certificate

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Current limiter of output transistor

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Reexamination Certificate

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Current limiting devices to reduce leakage, photo, or stand-by c

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Patent

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Current source responsive to supply voltage variations

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Patent

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Current-compensated CMOS output buffer adjusting edge rate...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
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