Memory cell
MESFET logic device with clamped output drive capacity and low p
Method and apparatus for a configurable low power high...
Method and apparatus for asynchronously controlling state...
Method and apparatus for implementing logic using...
Method and apparatus for low power data transmission
Method and apparatus for providing a combination...
Method and apparatus for ratioed logic structure that uses...
Method and apparatus for reducing bipolar current effects in...
Method and apparatus for selectively controlling weak...
Method and circuit for high speed transmission gate logic
Method and mechanism to determine keeper size
Method for clock control of clocked half-rail differential...
Method for clock control of clocked half-rail differential...
Method for elimination of parasitic bipolar action in...
Method for generating differential tri-states and...
Method for power consumption reduction in a limited-switch...
More-than-one detector
MOS logic circuit and semiconductor apparatus including the same
MOS logic circuit and semiconductor apparatus including the...