High-density erasable programmable logic device architecture usi
High-density low-power circuit for sustaining a precharge level
High-entrance high-speed logic operator which has a complex digi
High-fanout clock driver for low level gates
High-frequency phototransistor operated with multiple light sour
High-frequency solid-state relay
High-gain differential input comparator with emitter feedback in
High-gain stabilized converter
High-impedance FET circuit
High-level CMOS driver circuit
High-output solid state DC-AC inverter with improved overload pr
High-performance address buffer for random-access memory
High-performance, CMOS latch for improved reliability
High-performance, high-density CMOS decoder/driver circuit
High-speed address transition detection circuit
High-speed and low-power consumption decoder unit implemented by
High-speed bipolar-field effect transistor (BI-FET) circuit
High-speed buffer arrangement with no delay distortion
High-speed CML push-pull logic circuit having temperature compen
High-speed CMOS buffer with controlled slew rate